1. Field of the Invention
The present invention relates to a special light modulator for modulating light and in particular to mirror device constituted by a mirror element characterized by a hinge supporting the mirror and by an electrode controlling the mirror. It also relates to a production method for such a mirror device and to a projection apparatus comprising such a mirror device.
2. Description of the Related Art
Even though there are significant advances of the technologies for implementing an electromechanical mirror device as a spatial light modulator (SLM) in recent years, there are still limitations and difficulties when it is employed to provide a high quality image. Specifically, when the images are digitally controlled, the image quality is adversely affected due to the fact that the images are not displayed with a sufficient number of gray scales.
An electromechanical mirror device is drawing a considerable interest as a spatial light modulator (SLM). The electromechanical mirror device consists of a “mirror array” arranging a large number of mirror elements. In general, the mirror elements ranging from 60,000 to several millions of pieces are arranged on a surface of a substrate in an electromechanical mirror device.
Referring to FIG. 1A, an image display system 1 including a screen 2 is disclosed in a reference U.S. Pat. No. 5,214,420. A light source 10 is used for generating light energy for illuminating the screen 2. The generated light 9 is further concentrated and directed toward a lens 12 by a mirror 11. Lenses 12, 13 and 14 form a beam columnator operative to columnate light 9 into a column of light 8. A spatial light modulator (SLM) 15 is controlled on the basis of data input by a computer 19 via a bus 18 and selectively redirects the portions of light from a path 7 toward an enlarger lens 5 and onto screen 2. The SLM 15 has a mirror array arraying switchable reflective elements 17, 27, 37, and 47 being consisted of a mirror 33 connected by a hinge 30 on a surface 16 of a substrate in the electromechanical mirror device as shown in FIG. 1B. When the element 17 is in one position, a portion of the light from the path 7 is redirected along a path 6 to lens 5 where it is enlarged or spread along the path 4 to impinge on the screen 2 so as to form an illuminated pixel 3. When the element 17 is in another position, the light is not redirected toward screen 2 and hence the pixel 3 is dark.
Each of mirror elements constituting a mirror device is to function as spatial light modulator (SLM) and each mirror element comprises a mirror and electrodes. A voltage applied to the electrode(s) generates a coulomb force between the mirror and the electrode(s), thereby making it possible to control and incline the mirror, and the mirror is “deflected” according to a common term used in this specification for describing the operational condition of a mirror element.
When a mirror is deflected by a voltage applied to the electrode(s) for controlling the mirror, the deflected mirror also changes the direction of the reflected light in reflecting the incident light. The direction of the reflected light is changed in accordance with the deflection angle of the mirror. The present specification refers to a state of the mirror when the light of which almost the entirety of the incident light is reflected to a projection path designated for image display as an “ON light”, while it refers to the light reflected to a direction other than the designated projection path for image display as an “OFF light”.
And a state of the mirror that reflects the light of the incident light in a manner that the ratio of the light, which is reflected to a projection path (i.e., the ON light), to that which is reflected so as to shift from the projection path (i.e., the OFF light) is referred to as a specific ratio. And that the light reflected to the projection path with a smaller quantity of light than the state of the ON light is referred to as an “intermediate light”.
The terminology of present specification defines an angle of rotation along a clockwise (CW) direction as a positive (+) angle and that of counterclockwise (CCW) direction as negative (−) angle. A deflection angle is defined as zero degree (0°) when the mirror is in the initial state, as a reference of mirror deflection angle.
Most of the conventional image display devices such as the devices disclosed in a U.S. Pat. No. 5,214,420 implements a dual-state mirror control that controls the mirrors in a state of either ON or OFF. The quality of an image display is limited due to the limited number of gray scales. Specifically, in a conventional control circuit that applies a PWM (Pulse Width Modulation), the quality of the image is limited by the LSB (least significant bit) or the least pulse width as a control related to the ON or OFF state. Since the mirror is controlled to operate in either the ON or OFF state, the conventional image projection apparatus has no way to provide a pulse width for controlling the mirror that is shorter than the control duration allowable on the basis of the LSB. The least quantity of light, which is determined on the basis of the gray scale, is the light reflected during the time duration based on the least pulse width. The limited number of gray scales leads to a degradation of the image.
Specifically, FIG. 1C exemplifies a control circuit for controlling a mirror element according to the disclosure in the U.S. Pat. No. 5,285,407. The control circuit includes a memory cell 32. Various transistors are referred to as “M*”, where “*” designates a transistor number and each transistor is an insulated gate field effect transistor. Transistors M5 and M7 are p-channel transistors; while transistors M6, M8, and M9 are n-channel transistors. The capacitances C1 and C2 represent the capacitive loads in the memory cell 32. The memory cell 32 includes an access switch transistor M9 and a latch 32a, which is based on a Static Random Access switch Memory (SRAM) design. The transistor M9 connected to a Row-line receives a data signal via a Bit-line. The memory cell 32 written data is accessed when the transistor M9 that has received the ROW signal on a Word-line is turned on. The latch 32a consists of two cross-coupled inverters, i.e., M5/M6 and M7/M8, which permit two stable states, that is, a state 1 is Node A high and Node B low, and a state 2 is Node A low and Node B high.
The mirror is driven by a voltage applied to the address electrode abutting an address electrode and is held at a predetermined deflection angle on the address electrode. An elastic “landing chip” is formed at a portion on the address electrode, which makes the address electrode contact with mirror, and assists the operation for deflecting the mirror toward the opposite direction when a deflection of the mirror is switched. The landing chip is designed as having the same potential with the address electrode, so that a shorting is prevented when the address electrode is in contact with the mirror.
Each mirror formed on a device substrate has a square or rectangular shape and each side has a length of 10 to 15 μm. However, in this configuration, an unexpected reflected light for projecting image is generated by reflection on the substrate of incident light through the gap between adjacent mirrors. The contrast of an image display generated by adjacent mirrors is degraded due to the reflections generated not by the mirrors but by the gaps between the mirrors. As a result, a quality of the image display is degraded. In order to overcome such problems, the mirrors are arrayed on a semiconductor wafer substrate with a layout to minimize the gaps between the mirrors. One mirror device is generally designed to include an appropriate number of mirror elements wherein each mirror element is manufactured as a deflectable mirror on the substrate for displaying a pixel of an image. The appropriate number of elements for displaying an image is in compliance with the display resolution standard according to a VESA Standard defined by Video Electronics Standards Association or television broadcast standards. In the case of the mirror device comprising a plurality of mirror elements corresponding to Wide extended Graphics Array (WXGA), whose resolution is 1280 by 768, defined by VESA, the pitch between the mirrors of the mirror device is 10 μm and the diagonal length of the mirror array is about 0.6 inches.
The control circuit as illustrated in FIG. 1C controls the mirrors to switch between two states and the control circuit drives the mirror to oscillate in either the ON or OFF deflected angle (or position).
The minimum quantity of light controllable to reflect from each mirror element for image display, i.e., the resolution of gray scale of image display for a digitally controlled image projection apparatus, is determined by the least length of time that the mirror is controllable to hold at the ON position. The length of time that each mirror is controlled to hold at an ON position is in turn controlled by multiple bit words. FIG. 1D shows the “binary time periods” in the case of controlling an SLM by four-bit words. As shown in FIG. 1D, the time periods have relative values of 1, 2, 4, and 8 that in turn determine the relative quantity of light of each of the four bits, where the “1” is least significant bit (LSB) and the “8” is the most significant bit. According to the Pulse Width Modulation (PWM) control mechanism, the minimum quantity of light that determines the resolution of the gray scale is a brightness controlled by using the “least significant bit” for holding the mirror at an ON position during a shortest controllable length of time.
In a simple example with n-bit word for controlling the gray scale, one frame time is divided into (2n−1) equal time slices. If one frame time is 16.7 msec., each time slice is 16.7/(2n−1) msec.
Having set these time lengths for each pixel in each frame of the image, the quantity of light in a pixel which is quantified as “0” time slices is black (i.e., no quantity of light), “1” time slice is the quantity of light represented by the LSB, and 15 time slices (in the case of n=4) is the quantity of light represented by the maximum brightness. Based on the light being quantified, the time of mirror being held at the ON position during one frame period is determined by each pixel. Thus, each pixel with a quantified value which is more than “0” time slice is displayed for the screen by the mirror being held at the ON position with the number of time slices corresponding to its quantity of light during one frame period. The viewer's eye integrates the brightness of each pixel in such a manner that the image is displayed as if the image were generated with analog levels of light.
For controlling deflectable mirror devices, the PWM calls for the data to be formatted into “bit-planes”, where each bit-plane corresponds to a bit weight of the quantity of light. Thus, when the brightness of each pixel is represented by an n-bit value, each frame of data has the n-bit planes. Then, each bit-plane has a “0” or “1” value for each mirror element. In the PWM described in the preceding paragraphs, each bit-plane is independently loaded and the mirror elements are controlled on the basis of bit-plane values corresponding to them during one frame. For example, the bit-plane representing the LSB of each pixel is displayed as a “1” time slice.
When adjacent image pixels are displayed with a very coarse gray scales caused by great differences of quantity of light, thus, artifacts are shown between these adjacent image pixels. That leads to the degradations of image qualities. The degradations of image qualities are specially pronounced in bright areas of image when there are “bigger gaps” of gray scale, i.e. quantity of light, between adjacent image pixels. The artifacts are caused by a technical limitation that the digitally controlled image does not obtain a sufficient number of gray scales, i.e. the levels of the quantity of light.
The mirrors are controlled either at the ON or OFF position. Then, the quantity of light of a displayed image is determined by the length of time each mirror is held, which is at the ON position. In order to increase the number of levels of the quantity of light, the switching speed of the ON or OFF positions for the mirror must be increased. Therefore the digitally control signals need be increased to a higher number of bits. However, when the switching speed of the mirror deflection is increased, a stronger hinge for supporting the mirror is necessary to sustain a required number of switches of the ON or OFF positions for the mirror deflection. Furthermore, in order to drive the mirrors provided with a strengthened hinge to the ON or OFF position, applying a higher voltage to the electrode is required. The higher voltage may exceed twenty volts and may even be as high as thirty volts. The mirrors produced by applying the CMOS technologies probably is not appropriate for operating the mirror at such a high range of voltages, and therefore the DMOS mirror devices may be required. In order to achieve a control of a higher number of gray scales, a more complicated production process and larger device areas are required to produce the DMOS mirror. Conventional mirror controls are therefore faced with a technical problem that the good accuracy of gray scales and range of the operable voltage have to be sacrificed for the benefits of a smaller image projection apparatus.
There are many patents related to the control of quantity of light. These Patents include the U.S. Pat. Nos. 5,589,852, 6,232,963, 6,592,227, 6,648,476, and 6,819,064. There are further patents and patent applications related to different sorts of light sources. These Patents include the U.S. Pat. Nos. 5,442,414, 6,036,318 and Application 20030147052. Also, The U.S. Pat. No. 6,746,123 has disclosed particular polarized light sources for preventing the loss of light. However, these patents or patent applications do not provide an effective solution to attain a sufficient number of gray scales in the digitally controlled image display system.
Furthermore, there are many patents related to a spatial light modulation that includes the U.S. Pat. Nos. 2,025,143, 2,682,010, 2,681,423, 4,087,810, 4,292,732, 4,405,209, 4,454,541, 4,592,628, 4,767,192, 4,842,396, 4,907,862, 5,214,420, 5,287,096, 5,506,597, and 5,489,952. However, these inventions do not provide a direct solution for a person skilled in the art to overcome the above-discussed limitations and difficulties.
In view of the above problems, an invention has disclosed a method for controlling the deflection angle of the mirror to express higher number of gray scales of an image in a US Patent Application 20050190429. In this disclosure, the quantity of light obtained during the oscillation period of the mirror is about 25% to 37% of the quantity of light obtained during the mirror is held on the ON position at all times.
According to such control, it is not particularly necessary to drive the mirror at high speed. Also, it is possible to provide a higher number of gray scales using a low elastic constant of the hinge that supports the mirror. Hence, such control makes it possible to reduce the voltage applied to the address electrode.
An image projection apparatus using the mirror device described above is broadly categorized into two types, i.e., a single-plate image projection apparatus implemented with only one spatial light modulator and a multi-plate image projection apparatus implemented with a plurality of spatial light modulators. In the single-plate image projection apparatus, a color image is displayed by changing in turn the colors, i.e. frequency or wavelength of projected light is changed by time. In a multi-plate image projection apparatus, a color image is displayed by allowing the spatial light modulators corresponding to beams of light having different colors, i.e. frequencies or wavelengths of the light, to modulate the beams of light; and combined with the modulated beams of light at all times.
In these days, high resolutions such as a full high-definition (Full HD: 1920 by 1080 pixels) are required on the filed of a projection apparatus, prompting the design and development of a higher resolution display.
A mirror device used in such a projection apparatus is constituted by a mirror array arraying one to two million mirror elements in a two-dimensional array.
The size of a mirror of the mirror element of a common mirror device is a square of 11 μm. The wiring process rule of a CMOS circuit unit of a memory cell for driving the mirror is configured to be 0.25 μm. The mirror is controlled by setting the operating voltage of the memory cell or mirror drive voltage, which is set to more than twenty volts. Such a mirror is supported by an elastic hinge.
A common mirror device used for a Full High Definition (Full-HD) is the diagonal size of 24.13 mm (0.95 inches), with the mirror pitch of 11 μm. An extended Graphics Array (XGA)-size mirror device has the diagonal size of 17.78 mm (0.7 inches) of the mirror array, with the mirror pitch of 14 μm.
FIG. 2 is a diagonal view of a mirror device arraying, in two-dimension on a device substrate, mirror elements controlling a reflection direction of incident light by deflecting the mirror.
The mirror device 200 shown in FIG. 2 is constituted by arraying a plurality of mirror elements, each mirror element 300 is constituted by address electrode (not shown in a drawing herein), elastic hinge (not shown in a drawing herein) and a mirror supported by the elastic hinge, lengthwise and crosswise (in two-dimension) on a device substrate 303. FIG. 2 illustrates a case of arraying a plurality of mirror elements respectively comprising square mirrors 302 lengthwise and crosswise at a constant interval on the device substrate 303. The mirror 302 of one mirror element 300 is controlled by applying a voltage to the address electrode provided on the device substrate 303.
And a deflection axis 201 for deflecting the mirror 302 is indicated by the dotted line. The light emitted from a light source 301 is incident to the mirror 302 so as to be orthogonal or diagonal to the deflection axis 201.
Note that the present specification document calls the distance between the deflection axes of adjacent mirrors 302 as pitch and the distance between the respective sides of the present mirror and adjacent mirror 302 as gap.
The following is a description on an operation of one mirror element 300 by referring to the cross-sectional line II-II of the one mirror element 300 of the mirror device 200 shown in FIG. 2.
FIGS. 3A and 3B are cross-sectional diagrams of one mirror element in the line II-II of the mirror device shown in FIG. 2.
The one mirror element 300 comprises a mirror 302, an elastic hinge 304 supporting the mirror 302, address electrodes 307a and 307b, and two memory cells including a first memory cell and a second memory cell both for applying a voltage to the address electrodes 307a and 307b in order to control the mirror 302 under a desired deflection state. The drive circuits for the respective memory cells are provided in the inside of the device substrate 303 so that a control of each memory cell based on the signal of image data makes it possible to control the deflection angle of the mirror 302, and modulate and reflect the incident light.
FIG. 3A is a cross-sectional diagram of a mirror element reflecting incident light to a projection optical system by deflecting the mirror.
An application of a signal (0, 1) to a memory cell applies a voltage of “0” volt to the address electrode 307a and that of Va volts to the address electrode 307b, both shown in FIG. 3A. As a result, the mirror 302 is drawn by a coulomb force and deflected from the horizontal state to the direction of the address electrode 307b to which a voltage of Va volts is applied. This results in reflecting the incident light on the mirror 302 to the projection optical system (which is called an ON light state). Note that an insulation layer 306 is applied onto the device electrode 303, and a hinge electrode 305 connected to the elastic hinge 304 is grounded through a Via (not shown in a drawing herein) disposed in the insulation layer 306.
FIG. 3B is a cross-sectional diagram of a mirror element not reflecting the incident light to the projection optical system by deflecting the mirror.
An application of a signal (1, 0) to a memory cell applies a voltage of Va volts to the address electrode 307a and that of “0” volt to the address electrode 307b. As a result, the mirror 302 is drawn by a coulomb force and deflected from the horizontal state to the direction of the address electrode 307a to which a voltage of Va volts is applied. This results in reflecting the incident light to the outside of the projection optical system (which is called an OFF light state).
Incidentally, the coulomb force generated between the mirror 302 and address electrode 307a, or 307b, is expressed by the following expression:F=k′e SV2/2h2  (1);
where S is the area size of the address electrode 307a or 307b, h is the distance between the mirror 302 and address electrode 307a or 307b, e is the permittivity between the mirror 302 and address electrode 307a or 307b, V is the voltage applied to the address electrode 307a or 307b, and k′ is a correction coefficient.
FIG. 4 is a cross-sectional diagram exemplifying a situation of operating each mirror element disposed on the device substrate shown in FIG. 2.
An independent operation of the each mirror element 300 in the ON light state or OFF light state as shown in FIGS. 3A and 3B controls the direction of reflection of the incident light. Here, the incident light to the side edges of the mirror 302 is diffused to directions other than the desired direction when the light is reflected. And the incident light going through the gap between the adjacent mirrors 302 is reflected on the device substrate 303, thus generating an extraneous reflection light.
Meanwhile, in the mirror 302 illuminated by the incident light, a diffraction light is generated in a direction orthogonal to each side of the mirror 302. If these components of diffusion light and extraneous diffraction light enter the eye of the projection lens of the projection apparatus, the contrast of an image is degraded.
A few characteristic mirrors 302 are disclosed as the mirrors 302 of such mirror elements 300 of the above described mirror device 200.
One example is a U.S. Pat. No. 6,128,121 disclosing a mirror comprising an opening part at the center of the support layer of the mirror, on which a reflection member is layered.
Such a mirror 302, however, comprising the opening part at the center of the support layer, allows a small step nearby the opening part of the layered reflection member. This step allows a generation of an extraneous diffraction light from the center of the mirror 302. And the diffraction light entering the projection lens 309 causes the problem of degrading the contrast of an image.
FIG. 5 illustrates a mirror comprising an opening part at the center of the support layer of the mirror 302, on which a reflection member is layered. Note that this delineates by emphasizing a step 552 of the reflection member at the center.
An illumination, on the step 552 nearby the opening part of the mirror 302, of the light 551 emitted from the light source 301 generates diffraction light 553 in a direction orthogonal to a side orthogonal to a direction of light illuminated on the step 552 of the opening. And the incidence of the diffraction light 553 to the projection lens degrades the contrast of an image. Therefore, the mirror must be designed by considering such an influence of the diffraction light 553.
The mirror device as described above can normally be produced through a process similar to the production process for a semiconductor. The production process primarily includes chemical vapor deposition (CVD), photolithography, etching, doping, chemical mechanical polishing (CMP), et cetera.
Next, in order to respond to a high resolution projection apparatus, the number of mirror elements must also be increased, requiring a miniaturization of a mirror size of the mirror element. An increase of the number of mirror elements without miniaturizing the mirror size enlarges the size of the mirror array proportionately with the number of mirror elements. And brought about is a problem of an enlarged mirror device enlarging the entirety of the optical system of the projection apparatus, resulting in enlarging the projection apparatus per se. Therefore, an important challenge for solving the problem of enlarged projection apparatus associated with the high resolution projection apparatus is a response to the miniaturization of the mirror size of a mirror element.
Also required for miniaturizing the mirror size is a miniaturization of the memory cell and structure body disposed under the mirror. For miniaturizing the memory cell, the wiring process rule for a MOS circuit of the memory cell also needs to be miniaturized. Once the wiring process rule is miniaturized, the operating voltage of an FET transistor or such is decreased, and a voltage applicable to an individual address electrode for controlling the deflection of a mirror is decreased. If the deflection of a mirror is controlled in such a configuration without improving an elastic hinge, a voltage to be applied to the address electrode needs to be increased in order to control the deflection of the mirror. Consequently ushered in is a problem such as a circuit formed in the device substrate (e.g., the withstand voltage of a transistor, the capacitance of a DRAM capacitor, et cetera) needing to be increased for increasing the voltage to be applied to the address electrode. In order to solve such a problem, the elastic hinge also needs to be miniaturized. The elastic hinge, however, is very thin and small as compared to the mirror, requiring a consideration for the endurance against a repetition of usages as well as considerations for the method of supporting the mirror and for the endurance against usage environments and temperature changes in order to achieve a miniaturization of the elastic hinge, thus a difficulty accompanies the miniaturization of the elastic hinge.
Meanwhile, an enforcement of a restitution force of the elastic hinge makes it possible to speed up the deflecting operation of the mirror. A speedier deflection control enables a minute adjustment of a light intensity and an obtainment of a higher level-gray scale of an image. A reinforcement of the elastic hinge for an improved restitution force thereof (e.g., increasing the thickness of the elastic hinge), however, requires an increased voltage to be applied to the address electrode, requiring a larger area size thereof. In terms of this point, the elastic hinge is conventionally placed at the center of a mirror, thus limiting the design of a mirror element, such as the form and area size of the address electrode, and therefore a hurdle exists in enlarging the area size of the address electrode as well.
The following lists reference patent documents related to the structures of conventional mirror devices and the technique for producing such mirror devices.
United States Patent Application Publication No. 5214420: this document has disclosed a structure of a mirror device.
United States Patent Application Publication No. 5936760: this document has disclosed a mirror device implemented with a hinge by putting a hole in the sacrifice layer.
United States Patent Application Publication No. 6929969, No. 5083857, No. 5526951, and No. 20020024641: these documents have disclosed production methods for a mirror device.
United States Patent Application Publication No. 5673139 and 7233428: these documents have disclosed structures of a vertical hinge of a mirror element.
United States Patent Application Publication No. 6735008: this document has disclosed a mirror device equipped with a vertical hinge.
United States Patent Application Publication No. 6552840: this document has disclosed a mirror device equipping a step on an electrode surface.
United States Patent Application Publication No. 5504614: this document has disclosed a method of an ion implant to a hinge layer when producing a mirror device.
United States Patent Application Publication No. 4566935: this document has disclosed a method for removing a sacrifice layer when producing a mirror device.
United States Patent Application Publication No. 6942811 and No. 6800210: these documents have disclosed etching methods when producing a mirror device.
United States Patent Application Publication No. 5817569, No. 6900072, No. 6686291 and No. 6787187: these documents have disclosed methods of dicing when producing a mirror device.